Figures

Figure 1

Thermal boundary resistance as a function temperature for GaN/SiC interface. Results are shown in semi-log scale. The dashed line corresponds to the low temperature approximation.

Figure 2

Layered structure of the AlGaN/GaN heterostructure field-effect transistor.

Figure 3

Temperature profiles in GaN/AlGaN HFETs on SiC substrate for two different values of the thermal boundary resistance. Left panel shows the results for R = 1.2 10-9 m2K/W, right panel shows the results for R = 1.2 10-8 m2K/W. The dissipated power is P = 12 W/mm in both cases. Note the different temperature scale in two figures.

Figure 4

Temperature maximum in the drain-gate opening as function of the thermal boundary resistance for the GaN/SiC interface (dissipated power is P/W = 10W/mm) and for GaN/Sapphire interface (dissipated power is P/W = 2.5W/mm). The results are shown for the two different HFETs with L=250nm heat-source length (blue curves) and L=1mm (black curves).

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