Patterning III-N Semiconductors by Low Energy Electron Enhanced Etching (LE4)


H.P. Gillis, M.B. Christopher
UCLA

K.P. Martin
Georgia Tech

D.A. Choutov
Georgia Tech and National Semiconductor

This article was presented as part of Symposium G, "Gallium Nitride and Related Alloys" at the 1998 Fall Meeting of the Materials Research Society held in Boston, Massachusetts, November 30-December 4.

Abstract

Fabricating device structures from the III-N wide bandgap semiconductors requires anisotropoic dry etching processes that leave smooth surfaces with stoichiometric composition after transferring high-resolution patterns with vertical sidewalls. The purpose of this article is to describe results obtained by a new low-damage dry etching technique that provides an alternative to the standard ion-enhanced dry etching methods in meeting these demands for processing the III-N materials.

Full text of this article is available.

For information about using Adobe Acrobat files, click here .

Cite this article as: MRS Internet J. Nitride Semicond. Res. 4S1, G8.2 (1999).


Reference List Building

For information on building reference lists, see About the MIJ-NSR Reference List Builder



MRS Internet Journal of Nitride Semiconductor Research
last updated Saturday, April 3, 1999 2:45:42 AM.
© 1999 The Materials Research Society